376 lines
14 KiB
XML
376 lines
14 KiB
XML
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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<project source="4.0.0" version="1.0">
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This file is intended to be loaded by Logisim-evolution v4.0.0(https://github.com/logisim-evolution/).
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<lib desc="#Wiring" name="0">
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<tool name="Pin">
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<a name="appearance" val="classic"/>
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</tool>
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</lib>
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<lib desc="#Gates" name="1"/>
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<lib desc="#Plexers" name="2"/>
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<lib desc="#Arithmetic" name="3"/>
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<lib desc="#Memory" name="4"/>
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<lib desc="#I/O" name="5"/>
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<lib desc="#TTL" name="6"/>
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<lib desc="#TCL" name="7"/>
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<lib desc="#Base" name="8"/>
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<lib desc="#BFH-Praktika" name="9"/>
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<lib desc="#Input/Output-Extra" name="10"/>
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<lib desc="#Soc" name="11"/>
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<main name="ALU_1BIT"/>
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<options>
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<a name="gateUndefined" val="ignore"/>
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<a name="simlimit" val="1000"/>
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<a name="simrand" val="0"/>
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</options>
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<mappings>
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<tool lib="8" map="Button2" name="Poke Tool"/>
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<tool lib="8" map="Button3" name="Menu Tool"/>
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<tool lib="8" map="Ctrl Button1" name="Menu Tool"/>
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</mappings>
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<toolbar>
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<tool lib="8" name="Poke Tool"/>
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<tool lib="8" name="Edit Tool"/>
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<tool lib="8" name="Wiring Tool"/>
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<tool lib="8" name="Text Tool"/>
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<sep/>
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<tool lib="0" name="Pin"/>
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<tool lib="0" name="Pin">
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<a name="facing" val="west"/>
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<a name="type" val="output"/>
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</tool>
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<sep/>
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<tool lib="1" name="NOT Gate"/>
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<tool lib="1" name="AND Gate"/>
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<tool lib="1" name="OR Gate"/>
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<tool lib="1" name="XOR Gate"/>
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<tool lib="1" name="NAND Gate"/>
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<tool lib="1" name="NOR Gate"/>
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<sep/>
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<tool lib="4" name="D Flip-Flop"/>
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<tool lib="4" name="Register"/>
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</toolbar>
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<circuit name="Main">
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<a name="appearance" val="logisim_evolution"/>
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<a name="circuit" val="Main"/>
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<a name="circuitnamedboxfixedsize" val="true"/>
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<a name="simulationFrequency" val="1.0"/>
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<comp lib="0" loc="(260,210)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="type" val="output"/>
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<a name="width" val="2"/>
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</comp>
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<comp lib="0" loc="(260,230)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="width" val="2"/>
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</comp>
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<comp lib="0" loc="(260,250)" name="Pin">
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<a name="appearance" val="classic"/>
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</comp>
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<comp lib="0" loc="(260,270)" name="Pin">
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<a name="appearance" val="classic"/>
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</comp>
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<comp lib="0" loc="(260,290)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="width" val="2"/>
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</comp>
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<comp lib="0" loc="(260,310)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="width" val="2"/>
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</comp>
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<comp lib="0" loc="(570,210)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="facing" val="west"/>
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<a name="type" val="output"/>
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</comp>
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<comp lib="0" loc="(570,230)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="facing" val="west"/>
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<a name="type" val="output"/>
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</comp>
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<comp lib="0" loc="(570,250)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="facing" val="west"/>
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<a name="type" val="output"/>
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</comp>
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<comp lib="8" loc="(203,317)" name="Text">
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<a name="text" val="Operator"/>
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</comp>
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<comp lib="8" loc="(207,216)" name="Text">
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<a name="text" val="Output"/>
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</comp>
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<comp lib="8" loc="(208,277)" name="Text">
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<a name="text" val="Binvert"/>
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</comp>
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<comp lib="8" loc="(209,257)" name="Text">
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<a name="text" val="Carry In"/>
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</comp>
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<comp lib="8" loc="(224,238)" name="Text">
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<a name="text" val="A"/>
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</comp>
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<comp lib="8" loc="(225,297)" name="Text">
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<a name="text" val="B"/>
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</comp>
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<comp lib="8" loc="(615,217)" name="Text">
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<a name="text" val="Zero"/>
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</comp>
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<comp lib="8" loc="(630,236)" name="Text">
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<a name="text" val="Overflow"/>
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</comp>
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<comp lib="8" loc="(632,256)" name="Text">
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<a name="text" val="Carry Out"/>
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</comp>
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<comp loc="(530,210)" name="ALU_2BIT"/>
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<wire from="(260,210)" to="(310,210)"/>
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<wire from="(260,230)" to="(310,230)"/>
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<wire from="(260,250)" to="(310,250)"/>
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<wire from="(260,270)" to="(310,270)"/>
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<wire from="(260,290)" to="(310,290)"/>
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<wire from="(260,310)" to="(310,310)"/>
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<wire from="(530,210)" to="(570,210)"/>
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<wire from="(530,230)" to="(570,230)"/>
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<wire from="(530,250)" to="(570,250)"/>
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</circuit>
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<circuit name="ALU_2BIT">
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<a name="appearance" val="logisim_evolution"/>
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<a name="circuit" val="ALU_2BIT"/>
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<a name="circuitnamedboxfixedsize" val="true"/>
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<a name="simulationFrequency" val="1.0"/>
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<comp lib="0" loc="(120,250)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="width" val="2"/>
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</comp>
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<comp lib="0" loc="(130,360)" name="Pin">
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<a name="appearance" val="classic"/>
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</comp>
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<comp lib="0" loc="(130,500)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="width" val="2"/>
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</comp>
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<comp lib="0" loc="(140,660)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="width" val="2"/>
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</comp>
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<comp lib="0" loc="(160,250)" name="Splitter"/>
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<comp lib="0" loc="(170,500)" name="Splitter"/>
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<comp lib="0" loc="(200,310)" name="Pin">
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<a name="appearance" val="classic"/>
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</comp>
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<comp lib="0" loc="(820,510)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="facing" val="west"/>
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<a name="type" val="output"/>
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</comp>
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<comp lib="0" loc="(890,200)" name="Splitter">
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<a name="facing" val="west"/>
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</comp>
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<comp lib="0" loc="(920,360)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="facing" val="west"/>
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<a name="type" val="output"/>
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</comp>
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<comp lib="0" loc="(950,200)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="width" val="2"/>
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</comp>
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<comp lib="0" loc="(980,270)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="facing" val="west"/>
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<a name="type" val="output"/>
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</comp>
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<comp lib="1" loc="(880,360)" name="XOR Gate"/>
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<comp lib="1" loc="(930,270)" name="OR Gate"/>
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<comp lib="8" loc="(1030,275)" name="Text">
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<a name="text" val="Zero"/>
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</comp>
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<comp lib="8" loc="(135,310)" name="Text">
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<a name="text" val="Carry In"/>
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</comp>
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<comp lib="8" loc="(60,365)" name="Text">
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<a name="text" val="Binvert"/>
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</comp>
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<comp lib="8" loc="(70,665)" name="Text">
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<a name="text" val="Operation"/>
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</comp>
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<comp lib="8" loc="(80,255)" name="Text">
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<a name="text" val="A"/>
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</comp>
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<comp lib="8" loc="(80,525)" name="Text">
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<a name="text" val="B"/>
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</comp>
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<comp lib="8" loc="(895,510)" name="Text">
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<a name="text" val="Carry Out"/>
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</comp>
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<comp lib="8" loc="(985,205)" name="Text">
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<a name="text" val="Output"/>
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</comp>
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<comp lib="8" loc="(985,365)" name="Text">
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<a name="text" val="Overflow"/>
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</comp>
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<comp loc="(680,210)" name="ALU_1BIT"/>
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<comp loc="(680,490)" name="ALU_1BIT"/>
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<wire from="(120,250)" to="(160,250)"/>
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<wire from="(130,360)" to="(260,360)"/>
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<wire from="(130,500)" to="(170,500)"/>
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<wire from="(140,660)" to="(290,660)"/>
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<wire from="(180,230)" to="(460,230)"/>
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<wire from="(180,240)" to="(410,240)"/>
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<wire from="(190,480)" to="(230,480)"/>
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<wire from="(190,490)" to="(460,490)"/>
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<wire from="(200,310)" to="(260,310)"/>
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<wire from="(230,210)" to="(230,480)"/>
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<wire from="(230,210)" to="(460,210)"/>
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<wire from="(260,250)" to="(260,310)"/>
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<wire from="(260,250)" to="(460,250)"/>
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<wire from="(260,360)" to="(260,570)"/>
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<wire from="(260,360)" to="(440,360)"/>
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<wire from="(260,570)" to="(460,570)"/>
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<wire from="(290,270)" to="(290,550)"/>
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<wire from="(290,270)" to="(460,270)"/>
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<wire from="(290,550)" to="(290,660)"/>
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<wire from="(290,550)" to="(460,550)"/>
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<wire from="(350,440)" to="(350,530)"/>
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<wire from="(350,440)" to="(710,440)"/>
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<wire from="(350,530)" to="(460,530)"/>
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<wire from="(410,240)" to="(410,510)"/>
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<wire from="(410,510)" to="(460,510)"/>
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<wire from="(440,290)" to="(440,360)"/>
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<wire from="(440,290)" to="(460,290)"/>
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<wire from="(680,210)" to="(830,210)"/>
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<wire from="(680,230)" to="(710,230)"/>
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<wire from="(680,490)" to="(750,490)"/>
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<wire from="(680,510)" to="(780,510)"/>
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<wire from="(710,230)" to="(710,340)"/>
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<wire from="(710,340)" to="(710,440)"/>
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<wire from="(710,340)" to="(820,340)"/>
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<wire from="(750,220)" to="(750,490)"/>
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<wire from="(750,220)" to="(790,220)"/>
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<wire from="(780,380)" to="(780,510)"/>
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<wire from="(780,380)" to="(820,380)"/>
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<wire from="(780,510)" to="(820,510)"/>
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<wire from="(790,220)" to="(790,290)"/>
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<wire from="(790,220)" to="(870,220)"/>
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<wire from="(790,290)" to="(880,290)"/>
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<wire from="(830,210)" to="(830,250)"/>
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<wire from="(830,210)" to="(870,210)"/>
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<wire from="(830,250)" to="(880,250)"/>
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<wire from="(880,360)" to="(920,360)"/>
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<wire from="(890,200)" to="(930,200)"/>
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<wire from="(930,270)" to="(980,270)"/>
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</circuit>
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<circuit name="ALU_1BIT">
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<a name="appearance" val="logisim_evolution"/>
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<a name="circuit" val="ALU_1BIT"/>
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<a name="circuitnamedboxfixedsize" val="true"/>
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<a name="simulationFrequency" val="1.0"/>
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<appear>
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<rect fill="none" height="60" stroke="#000000" width="220" x="50" y="50"/>
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<text dominant-baseline="central" font-family="SansSerif" font-size="10" font-weight="bold" text-anchor="middle" x="157" y="81">1 BIT ALU</text>
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<circ-anchor facing="east" x="160" y="60"/>
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<circ-port dir="in" pin="170,180" x="50" y="60"/>
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<circ-port dir="in" pin="210,180" x="50" y="70"/>
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<circ-port dir="in" pin="250,180" x="50" y="80"/>
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<circ-port dir="in" pin="270,710" x="50" y="100"/>
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<circ-port dir="in" pin="570,350" x="50" y="90"/>
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<circ-port dir="out" pin="390,580" x="270" y="70"/>
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<circ-port dir="out" pin="640,290" x="270" y="60"/>
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</appear>
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<comp lib="0" loc="(170,180)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="facing" val="south"/>
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</comp>
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<comp lib="0" loc="(210,180)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="facing" val="south"/>
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</comp>
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<comp lib="0" loc="(250,180)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="facing" val="south"/>
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</comp>
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<comp lib="0" loc="(270,710)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="facing" val="north"/>
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</comp>
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<comp lib="0" loc="(390,580)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="facing" val="north"/>
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<a name="type" val="output"/>
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</comp>
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<comp lib="0" loc="(570,350)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="facing" val="north"/>
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<a name="width" val="2"/>
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</comp>
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<comp lib="0" loc="(640,290)" name="Pin">
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<a name="appearance" val="classic"/>
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<a name="facing" val="west"/>
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<a name="type" val="output"/>
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</comp>
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<comp lib="1" loc="(220,640)" name="NOT Gate"/>
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<comp lib="1" loc="(420,270)" name="AND Gate"/>
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<comp lib="1" loc="(420,390)" name="OR Gate"/>
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<comp lib="2" loc="(290,650)" name="Multiplexer"/>
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<comp lib="2" loc="(590,290)" name="Multiplexer">
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<a name="select" val="2"/>
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</comp>
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<comp lib="3" loc="(410,520)" name="Adder">
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<a name="width" val="1"/>
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</comp>
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<comp lib="8" loc="(170,145)" name="Text">
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<a name="text" val="B"/>
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</comp>
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<comp lib="8" loc="(205,145)" name="Text">
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<a name="text" val="A"/>
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</comp>
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<comp lib="8" loc="(270,145)" name="Text">
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<a name="text" val="Carry In"/>
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</comp>
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<comp lib="8" loc="(270,755)" name="Text">
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<a name="text" val="Binvert"/>
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</comp>
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<comp lib="8" loc="(395,620)" name="Text">
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<a name="text" val="Carry Out"/>
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</comp>
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<comp lib="8" loc="(580,390)" name="Text">
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<a name="text" val="Operation"/>
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</comp>
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<comp lib="8" loc="(690,295)" name="Text">
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<a name="text" val="Output"/>
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</comp>
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<wire from="(170,180)" to="(170,640)"/>
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<wire from="(170,640)" to="(180,640)"/>
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<wire from="(180,640)" to="(180,660)"/>
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<wire from="(180,640)" to="(190,640)"/>
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<wire from="(180,660)" to="(260,660)"/>
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<wire from="(210,180)" to="(210,250)"/>
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<wire from="(210,250)" to="(210,370)"/>
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<wire from="(210,250)" to="(370,250)"/>
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<wire from="(210,370)" to="(210,510)"/>
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<wire from="(210,370)" to="(370,370)"/>
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<wire from="(210,510)" to="(370,510)"/>
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<wire from="(220,640)" to="(260,640)"/>
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<wire from="(250,180)" to="(250,470)"/>
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<wire from="(250,470)" to="(390,470)"/>
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<wire from="(270,670)" to="(270,710)"/>
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<wire from="(290,650)" to="(320,650)"/>
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<wire from="(320,290)" to="(320,410)"/>
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<wire from="(320,290)" to="(370,290)"/>
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<wire from="(320,410)" to="(320,530)"/>
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<wire from="(320,410)" to="(370,410)"/>
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<wire from="(320,530)" to="(320,650)"/>
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<wire from="(320,530)" to="(370,530)"/>
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<wire from="(390,470)" to="(390,500)"/>
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<wire from="(390,540)" to="(390,580)"/>
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<wire from="(410,520)" to="(480,520)"/>
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<wire from="(420,270)" to="(550,270)"/>
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<wire from="(420,390)" to="(450,390)"/>
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<wire from="(450,280)" to="(450,390)"/>
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<wire from="(450,280)" to="(550,280)"/>
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<wire from="(480,290)" to="(480,520)"/>
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<wire from="(480,290)" to="(550,290)"/>
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<wire from="(570,310)" to="(570,350)"/>
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<wire from="(590,290)" to="(640,290)"/>
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</circuit>
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</project>
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