commit 4f53531d87ec54965f43d11abc9774b19f08bdf8
Author: 202410715256 ANDIKA ABDI PUTRA SEPTIANTO <202410715256@mhs.ubharajaya.ac.id>
Date:   Mon Dec 22 20:44:24 2025 +0700

    Upload files to "PSD_202410715256"

diff --git a/PSD_202410715256/LAPORAN PRAKTIKUM 6 PSD.pdf b/PSD_202410715256/LAPORAN PRAKTIKUM 6 PSD.pdf
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Binary files /dev/null and b/PSD_202410715256/LAPORAN PRAKTIKUM 6 PSD.pdf differ
diff --git a/PSD_202410715256/Tugas2BITALU.circ b/PSD_202410715256/Tugas2BITALU.circ
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+++ b/PSD_202410715256/Tugas2BITALU.circ
@@ -0,0 +1,173 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<project source="4.0.0" version="1.0">
+  This file is intended to be loaded by Logisim-evolution v4.0.0(https://github.com/logisim-evolution/).
+
+  <lib desc="#Wiring" name="0">
+    <tool name="Pin">
+      <a name="appearance" val="classic"/>
+      <a name="facing" val="south"/>
+    </tool>
+    <tool name="Probe">
+      <a name="appearance" val="classic"/>
+      <a name="radix" val="8"/>
+    </tool>
+  </lib>
+  <lib desc="#Gates" name="1"/>
+  <lib desc="#Plexers" name="2"/>
+  <lib desc="#Arithmetic" name="3"/>
+  <lib desc="#Memory" name="4"/>
+  <lib desc="#I/O" name="5"/>
+  <lib desc="#TTL" name="6"/>
+  <lib desc="#TCL" name="7"/>
+  <lib desc="#Base" name="8"/>
+  <lib desc="#BFH-Praktika" name="9"/>
+  <lib desc="#Input/Output-Extra" name="10"/>
+  <lib desc="#Soc" name="11"/>
+  <main name="main"/>
+  <options>
+    <a name="gateUndefined" val="ignore"/>
+    <a name="simlimit" val="1000"/>
+    <a name="simrand" val="0"/>
+  </options>
+  <mappings>
+    <tool lib="8" map="Button2" name="Poke Tool"/>
+    <tool lib="8" map="Button3" name="Menu Tool"/>
+    <tool lib="8" map="Ctrl Button1" name="Menu Tool"/>
+  </mappings>
+  <toolbar>
+    <tool lib="8" name="Poke Tool"/>
+    <tool lib="8" name="Edit Tool"/>
+    <tool lib="8" name="Wiring Tool"/>
+    <tool lib="8" name="Text Tool"/>
+    <sep/>
+    <tool lib="0" name="Pin"/>
+    <tool lib="0" name="Pin">
+      <a name="facing" val="west"/>
+      <a name="type" val="output"/>
+    </tool>
+    <sep/>
+    <tool lib="1" name="NOT Gate"/>
+    <tool lib="1" name="AND Gate"/>
+    <tool lib="1" name="OR Gate"/>
+    <tool lib="1" name="XOR Gate"/>
+    <tool lib="1" name="NAND Gate"/>
+    <tool lib="1" name="NOR Gate"/>
+    <sep/>
+    <tool lib="4" name="D Flip-Flop"/>
+    <tool lib="4" name="Register"/>
+  </toolbar>
+  <circuit name="main">
+    <a name="appearance" val="logisim_evolution"/>
+    <a name="circuit" val="main"/>
+    <a name="circuitnamedboxfixedsize" val="true"/>
+    <a name="simulationFrequency" val="1.0"/>
+    <appear>
+      <rect fill="none" height="265" stroke="#000000" width="203" x="374" y="62"/>
+      <text dominant-baseline="central" font-family="SansSerif" font-size="21" font-weight="bold" text-anchor="middle" x="482" y="173">1 BIT ALU</text>
+      <circ-anchor facing="east" x="480" y="200"/>
+      <circ-port dir="in" pin="270,210" x="540" y="330"/>
+      <circ-port dir="in" pin="320,210" x="420" y="330"/>
+      <circ-port dir="in" pin="370,210" x="480" y="60"/>
+      <circ-port dir="in" pin="390,630" x="370" y="250"/>
+      <circ-port dir="in" pin="810,380" x="370" y="120"/>
+      <circ-port dir="out" pin="540,540" x="480" y="330"/>
+      <circ-port dir="out" pin="900,300" x="580" y="190"/>
+    </appear>
+    <comp lib="0" loc="(270,210)" name="Pin">
+      <a name="appearance" val="classic"/>
+      <a name="facing" val="south"/>
+    </comp>
+    <comp lib="0" loc="(320,210)" name="Pin">
+      <a name="appearance" val="classic"/>
+      <a name="facing" val="south"/>
+    </comp>
+    <comp lib="0" loc="(370,210)" name="Pin">
+      <a name="appearance" val="classic"/>
+      <a name="facing" val="south"/>
+    </comp>
+    <comp lib="0" loc="(390,630)" name="Pin">
+      <a name="appearance" val="classic"/>
+      <a name="facing" val="north"/>
+    </comp>
+    <comp lib="0" loc="(540,540)" name="Pin">
+      <a name="appearance" val="classic"/>
+      <a name="facing" val="north"/>
+      <a name="type" val="output"/>
+    </comp>
+    <comp lib="0" loc="(810,380)" name="Pin">
+      <a name="appearance" val="classic"/>
+      <a name="facing" val="north"/>
+      <a name="width" val="2"/>
+    </comp>
+    <comp lib="0" loc="(900,300)" name="Pin">
+      <a name="appearance" val="classic"/>
+      <a name="facing" val="west"/>
+      <a name="type" val="output"/>
+    </comp>
+    <comp lib="1" loc="(330,560)" name="NOT Gate"/>
+    <comp lib="1" loc="(570,260)" name="AND Gate"/>
+    <comp lib="1" loc="(570,360)" name="OR Gate"/>
+    <comp lib="2" loc="(410,570)" name="Multiplexer"/>
+    <comp lib="2" loc="(830,300)" name="Multiplexer">
+      <a name="select" val="2"/>
+    </comp>
+    <comp lib="3" loc="(560,470)" name="Adder">
+      <a name="width" val="1"/>
+    </comp>
+    <comp lib="8" loc="(271,186)" name="Text">
+      <a name="font" val="SansSerif bold 14"/>
+      <a name="text" val="B"/>
+    </comp>
+    <comp lib="8" loc="(320,186)" name="Text">
+      <a name="font" val="SansSerif bold 14"/>
+      <a name="text" val="A"/>
+    </comp>
+    <comp lib="8" loc="(373,186)" name="Text">
+      <a name="font" val="SansSerif bold 14"/>
+      <a name="text" val="Carry in"/>
+    </comp>
+    <comp lib="8" loc="(542,576)" name="Text">
+      <a name="font" val="SansSerif bold 14"/>
+      <a name="text" val="Carry out"/>
+    </comp>
+    <comp lib="8" loc="(948,306)" name="Text">
+      <a name="font" val="SansSerif bold 14"/>
+      <a name="text" val="Output"/>
+    </comp>
+    <wire from="(270,210)" to="(270,560)"/>
+    <wire from="(270,560)" to="(290,560)"/>
+    <wire from="(290,560)" to="(290,580)"/>
+    <wire from="(290,560)" to="(300,560)"/>
+    <wire from="(290,580)" to="(380,580)"/>
+    <wire from="(320,210)" to="(320,240)"/>
+    <wire from="(320,240)" to="(320,340)"/>
+    <wire from="(320,240)" to="(520,240)"/>
+    <wire from="(320,340)" to="(320,460)"/>
+    <wire from="(320,340)" to="(520,340)"/>
+    <wire from="(320,460)" to="(520,460)"/>
+    <wire from="(330,560)" to="(380,560)"/>
+    <wire from="(370,210)" to="(370,420)"/>
+    <wire from="(370,420)" to="(540,420)"/>
+    <wire from="(390,590)" to="(390,630)"/>
+    <wire from="(410,570)" to="(470,570)"/>
+    <wire from="(470,280)" to="(470,380)"/>
+    <wire from="(470,280)" to="(520,280)"/>
+    <wire from="(470,380)" to="(470,480)"/>
+    <wire from="(470,380)" to="(520,380)"/>
+    <wire from="(470,480)" to="(470,570)"/>
+    <wire from="(470,480)" to="(520,480)"/>
+    <wire from="(540,420)" to="(540,450)"/>
+    <wire from="(540,490)" to="(540,540)"/>
+    <wire from="(560,470)" to="(680,470)"/>
+    <wire from="(570,260)" to="(770,260)"/>
+    <wire from="(570,360)" to="(650,360)"/>
+    <wire from="(650,290)" to="(650,360)"/>
+    <wire from="(650,290)" to="(790,290)"/>
+    <wire from="(680,310)" to="(680,470)"/>
+    <wire from="(680,310)" to="(790,310)"/>
+    <wire from="(770,260)" to="(770,280)"/>
+    <wire from="(770,280)" to="(790,280)"/>
+    <wire from="(810,320)" to="(810,380)"/>
+    <wire from="(830,300)" to="(900,300)"/>
+  </circuit>
+</project>